CTLDM7003T-M563D surface mount dual, n-channel enhancement-mode silicon mosfets description: the central semiconductor ctldm7003t- m563d is a dual n-channel mosfet packaged in a space saving 1.6 x 1.6mm tlm? surface mount package. this device is a tlm? equivalent of the popular cmldm7003t, sot-563 device, featuring enhanced thermal characteristics, a package footprint compatible with standard sot-563 mounting pad geometries, and a height profile of only 0.4mm. marking code: cja tlm563d case maximum ratings: (t a =25c) symbol units drain-source voltage v ds 50 v drain-gate voltage v dg 50 v gate-source voltage v gs 12 v continuous drain current i d 280 ma maximum pulsed drain current i dm 1.5 a power dissipation (note 1) p d 350 mw operating and storage junction temperature t j, t stg -65 to +150 c thermal resistance (note 1) ja 357 c/w electrical characteristics per transistor: (t a =25c unless otherwise noted) symbol test conditions min typ max units i gssf, i gssr v gs =5.0v, v ds =0 50 na i gssf, i gssr v gs =10v, v ds =0 0.5 a i gssf, i gssr v gs =12v, v ds =0 1.0 a i dss v ds =50v, v gs =0 50 na bv dss v gs =0, i d =10a 50 v v gs(th) v ds =10v, i d =250a 0.75 1.2 v v sd v gs =0, i s =115ma 1.4 v r ds(on) v gs =1.8v, i d =50ma 1.6 2.3 r ds(on) v gs =2.5v, i d =50ma 1.3 1.9 r ds(on) v gs =5.0v, i d =50ma 1.1 1.5 g fs v ds =10v, i d =200ma 200 ms c rss v ds =25v, v gs =0, f=1.0mhz 5.0 pf c iss v ds =25v, v gs =0, f=1.0mhz 50 pf c oss v ds =25v, v gs =0, f=1.0mhz 25 pf features: ? esd protection up to 2kv ? dual mosfets ? low r ds(on) (1.6 typ @ v gs =1.8v) ? tlm563d with a package profile of 0.4mm, compatible with sot-563 mounting geometries applications: ? load power switches ? dc/dc converters ? battery powered devices including cell phones, pdas, digital cameras, mp3 players, etc. notes: (1) mounted on 2 inch square fr4 pcb with copper mounting pad area of 1.8mm 2 . r1 (17-february 2010) www.centralsemi.com ? device is halogen free by design
CTLDM7003T-M563D surface mount dual, n-channel enhancement-mode silicon mosfets tlm563d case - mechanical outline lead code: 1) gate q1 2) source q1 3) drain q2 4) gate q2 5) source q2 6) drain q1 marking code: cja pin configuration suggested mounting pads (dimensions in mm) www.centralsemi.com r1 (17-february 2010)
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